Tek-Tips is the largest IT community on the Internet today!
Members share and learn making Tek-Tips Forums the best source of peer-reviewed technical information on the Internet!
-
Congratulations Chris Miller on being selected by the Tek-Tips community for having the most helpful posts in the forums last week. Way to Go!
conversions....
- Thread starter ladybug
- Start date
--doesn't deal with sign
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity conversion is
end conversion;
architecture test of conversion is
signal one : std_logic_vector(3 downto 0);
signal two : real;
signal three : integer;
begin
main : process
begin
two <= -10.1;
for i in 1 to 200 loop
wait for 100 ns;
two <= two + 0.1;
end loop;
wait;
end process;
three <= integer(two);
one <= conv_std_logic_vector(three,4);
end test;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity conversion is
end conversion;
architecture test of conversion is
signal one : std_logic_vector(3 downto 0);
signal two : real;
signal three : integer;
begin
main : process
begin
two <= -10.1;
for i in 1 to 200 loop
wait for 100 ns;
two <= two + 0.1;
end loop;
wait;
end process;
three <= integer(two);
one <= conv_std_logic_vector(three,4);
end test;
- Status