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Multiplication with shift and add
I checked implementation on Spartan3 FPGA, you will get 47 LUT's (4-input) with description above. Its pretty cheap ;) -
Multiplication with shift and add
Sorry there's a mistake. The code should be: library ieee; use ieee.numeric_std.all; ... constant c : signed(6 downto 0) := to_signed(51, 7); signal a : signed(9 downto 0); signal y : signed(16 downto 0); begin y <= a*c; ... there's always a little confusion with signed/unsigned... -
Multiplication with shift and add
Hi Can you please provide some code? What is the width of a signal for the result. I dont think you will get better result by coding it by hand. Synthesizers nowadays will infer constant coefficient multiplier efficiently. I would try this: library ieee; use ieee.numeric_std.all; ... constant...
