VHDL questions!

[asc01001]

Hi!

How can I in VHDL write
if(a >= 0 and a <= 5) -- if a is between 0 and 5..???????
What type does "a" have to be to be able to do this???

 

[CJ199]

Umm this might help

port(
A :in integer range 0 to 5;
);

If you cant get it from there let me know and ill tell you how....

 

[wkafig]

Hello asc01001-

Are you looking for specific syntax or methods of testing?

If a is defined as an integer range, then you can test for this with an "if" statement (as you have indicated, although for clarity, I'd add an extra set of parenthesis).

Depending on the synthesis tool, this may or may not work with std_logic_vector.

I generally don't do a lot from the simulation side of things, but this may work with a floating point number as well - but not in synthesis.

Hope this helps...