VHDL constants, use statement, and search path

[BFP]

Hi.

We are writing a program that imports VHDL and we need the ability to handle constants declared outside of a vhdl file. We basically need to understand the following:
1) If a file being referenced is outside the current directory, how is the path specified?
2) Are there any constants (used in port definitions) that might be declared in a standard library and in this case, do we need to be aware of a VHDL path statement?

For question 1, I have supplied an example below.

Suppose I have a file called utils.vhd that contains the following:

package utils is
  -- Define a 16 bit word
  subtype word is bit_vector(15 downto 0);
  -- Define an 8 bit byte
  subtype byte is bit_vector(7 downto 0);
end package body utils;

This file is used by cpu.vhd in the following way:

use work.utils.all;
entity cpu is
  port(dataout: out word;  		-- Data out to memory
       datain: in word;  		-- Data in from memory
       address: out word;  		-- Address to memory
       readStrobe,writeStrobe:out bit;  -- Read and write strobe to memory
       reset: in bit;  			-- Positive logic, asynch. reset
       clk: in bit);  			-- Leading edge triggered clock
end entity cpu;

How do I know that utils will be in the same directory as cpu?

Thanks,

D

 

[RVSachin]

It all depends on the tool you use. Just add all the vhdl files into your project and the tool will take care of the files, and their paths, irrespective of whether both the package file and the main file are in the same directory or not.

You probably have to just add the package file into your design.