Using a process inside a procedure

[farmdog69]

Are you allowed to use a process inside a procedure? Here's my code and the associated error. The goal was to implement a BCD counter that counts up to 10, then restarts back at 1.


procedure BCD_Counter (signal CLK, EN: in STD_LOGIC_VECTOR;
signal Q: out STD_LOGIC_VECTOR(3 downto 0)) is

variable Qout: STD_LOGIC_VECTOR(3 downto 0);

begin
Qout := "0000"; --initially set Qout = 0 to begin

process(CLK)
begin
if CLK'event and CLK = '1' then --when En = 1, counter increments on rising edge
if EN = '1' then
Qout := Qout + 1;
else
Qout := Qout;
end if;
if Qout > 10 then
Qout := "0001";
end if;
end if;
end process;
end BCD_Counter;


The erro is: parse error, unexpected IF, expecting SEMICOLON


I'm pretty sure I have all if statements ending with an end if. I have compiled this same code in an entity declaration, and it worked just fine. I was curious if you put a process in a procedure, what's the proper way to handle that?

Thanks a lot for your help.

 

[gemstar]

Hi there, I'm a bit of a newbie to vhdl but I have my doulos golden guide beside me and the answer your looking for is no, you can't put a process inside a procedure.

Processes can only be used in:

architecture - between begin/end
generate - between begin/end
entity - between begin/end (passive process only)
block - between begin/end (not supported by most synthesis tools)

Would do what your doing inside a process if I were you.

Other problems with your code are - you cant add 1 to a std_logic_vector, nor can you compare a std_logic_vector to an integer value. i.e. you cannot add 1 to Qout or compare Qout to 10.

To reslove this you should change Qout to type integer. This will default to a 32 bit integer so you really want to put:
variable Qout : integer range 0 to 11; --see why i chose 11 below

When you finally assign it to Q at the end of your code you should convert it into a 4-bit std_logic_vector by using:
Q <= std_logic_vector(to_unsigned(Qout, 4) - this requires you to include the library: use IEEE.NUMERIC_STD.all at the very top of your file before the entity declaration.

Not 100% sure about being able to do what you want to do in a procedure but if it is essential and as Qout is a variable you might be able to do it using the lines of code:

procedure BCD_Counter
(signal CLK, EN: in STD_LOGIC_VECTOR;
signal Q: out STD_LOGIC_VECTOR(3 downto 0)) is
begin
Qout := 0; -- will only run 1st time proceduere is called
Qout := Qout+1 when ((rising_edge(CLK) and (EN = '1')) else Qout; -- will output 1-10
Qout := 1 when ((rising_edge(CLK) and (EN = '1') and (Qout=11)) else Qout; --as this line executes last the previous value when Qout+1 = 11 is ignored. to get the value 10 out you must set Qout max = 11 otherwise it will only count to 9 - i think

Q <= std_logic_vector(to_unsigned(Qout, 4);

end BCD_counter;

Again, i'm jsut learning vhdl myself so the above may not work. No harm in giving it a blast though - good luck

 

[gemstar]

oops, missed out variable declaration in above code. looks like my brackets are a bit dodgy too.

don't forget:

variable Qout : integer range 0 to 11;

before begin block.

gstar