hi,
using a makefile is helpfull if you are working on a big project and files dependencies are huge . so that if you modify one file , you don't have to compile again the files dependent on it . makefile will automatically detect it .
in your case you can alias gcc as
alias gcc="gcc -pedantic -Wall"
you can change it as per your need
For using makefile the syntax is
<output file> : <<tab>> <dependencies
<<tab>> <rule applying on dependencies >
you can use predefined macro in the rule
$@ --- for output file
$< --- for first dependency
$^ --- for all dependency
for user defined one
MYVAR=........
to access it you write
$(MYVAR) --- same as in shell
sample makefile
TARGET=a.out
DEPEND=a.c
GCC=gcc -Wall -pedantic
$(TARGET) : $(DEPEND)
$(GCC) -o $@ $^
expeands as
gcc -Wall -pedantic -o a.out a.c
for more help read info make
as far as touch is concerned it changes the timestamp of the file . it might be used if you want the makefile to explicitly make a file ,you change the timestamp of its dependencies . (simple make rule if timestamp of target is older than of dependencies execute the rules )
hope it will help you
bye