I try to find a elegant way to code a component in order to employ it with different value of a constant.
The code is :
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity c_nibble is
Port ( input : in std_logic_vector(3 downto 0);
output : out std_logic_vector(3 downto 0));
end c_nibble;
architecture c_nibble_a of c_nibble is
component rom16x1
port( a3, a2, a1, a0 : in std_logic;
o : out std_logic);
end component;
attribute init : string;
attribute init of rom3 : label is "926C";
attribute init of rom2 : label is "4B5A";
attribute init of rom1 : label is "99CC";
attribute init of rom0 : label is "552A";
begin
rom3: rom16x1 port map ( a3 => input(3), a2 => input(2), a1 => input(1), a0 => input(0), o => output(3));
rom2: rom16x1 port map ( a3 => input(3), a2 => input(2), a1 => input(1), a0 => input(0), o => output(2));
rom1: rom16x1 port map ( a3 => input(3), a2 => input(2), a1 => input(1), a0 => input(0), o => output(1));
rom0: rom16x1 port map ( a3 => input(3), a2 => input(2), a1 => input(1), a0 => input(0), o => output(0));
end c_nibble_a;
If I want another instance of xc_nibblex with an output on 16 bits, my way of coding obliges me to create a new component. Does there exist a method to be able to change the number of bit of output as well as the constants at the time of instanciation?
Thank in advance
smu
The code is :
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity c_nibble is
Port ( input : in std_logic_vector(3 downto 0);
output : out std_logic_vector(3 downto 0));
end c_nibble;
architecture c_nibble_a of c_nibble is
component rom16x1
port( a3, a2, a1, a0 : in std_logic;
o : out std_logic);
end component;
attribute init : string;
attribute init of rom3 : label is "926C";
attribute init of rom2 : label is "4B5A";
attribute init of rom1 : label is "99CC";
attribute init of rom0 : label is "552A";
begin
rom3: rom16x1 port map ( a3 => input(3), a2 => input(2), a1 => input(1), a0 => input(0), o => output(3));
rom2: rom16x1 port map ( a3 => input(3), a2 => input(2), a1 => input(1), a0 => input(0), o => output(2));
rom1: rom16x1 port map ( a3 => input(3), a2 => input(2), a1 => input(1), a0 => input(0), o => output(1));
rom0: rom16x1 port map ( a3 => input(3), a2 => input(2), a1 => input(1), a0 => input(0), o => output(0));
end c_nibble_a;
If I want another instance of xc_nibblex with an output on 16 bits, my way of coding obliges me to create a new component. Does there exist a method to be able to change the number of bit of output as well as the constants at the time of instanciation?
Thank in advance
smu