Hi all,
I'm currently doing a project concerning VHDL. I would like to ask if anyone can direct me to places where there are some sample VHDL projects for me to work on and practise.
Any help / advise will be appreciated.
Thanks.
By the way, i'm using Xilinx ISE 7.1 and i'm not sure why I cannot simulate my simple comparator? Anyone also uses Xilinx ISE webpack here?
Thanks for reading
I'm currently doing a project concerning VHDL. I would like to ask if anyone can direct me to places where there are some sample VHDL projects for me to work on and practise.
Any help / advise will be appreciated.
Thanks.
By the way, i'm using Xilinx ISE 7.1 and i'm not sure why I cannot simulate my simple comparator? Anyone also uses Xilinx ISE webpack here?
Thanks for reading