How to divide by 10 keeping the code synthisizeble?

[Guest_imported]

How can I divide a number by 10 in VHDL and keeping the code synthesizeble? If you want to divide, you have to devide with a power of 2 in order to keep it synthesizeble (is translated to a shift operation in hardware).

 

[VhdlForLife]

Jan,

Are you dividing real numbers or integers? Is the purpose of this division to implement a hardware divide or is it for some internal portion of your actual hardware?