Echo effects in vhdl 2

[paulsam2004]

Hello friends

I need to develop a system wherein an analog audio is to processed to produce effects like echo, flanging. These effects has to be implemented using vhdl and it is to be downloaded to an fpga.

can anyone suggest me how to start with.

cheer's
Paul

 

[VHDLguy]

start by writing what needs to be done in a kind of psuedo code algorithm style.

if you want to post that I can kick you in the right direction maybe.

obviously you will be starting with a ADC (and I guess ending with a DAC), both outside of the FPGA (unless you have an FPGA with that functionality built-in). But other than that I have no idea on what you need to do.

--

http://www.lateralsands.com/

 

[paulsam2004]

Hello VHDLguy,

Thanks a lot for your reply. I will sooner post more details about it.

Cheer's
Paul

 

[paulsam2004]

Hi Vhdl guy,

You are correct. To start with i am employing an adc which converst the analog audio into a stram of bits. the digital data is then processed to prodece the desired effects. The problem lies there. How am i going to produce the echo effect in vhdl?. Could you please give me any suggestion.

Thanking you
paul

 

[VHDLguy]

Sorry for the long delay in writing.

First you are going to have to find out how to create those effects algorithmically (ie regardless of the implementation - in this case gates in an FPGA). From there we will have to come up with a way of implementing in an FPGA.

I guess there are some mathematical equations to show this functionality - what are they.

Thats probably the easy step. Sometime math functions are hard to implement in logic. but its a start.

--

http://www.lateralsands.com/

 

[paulsam2004]

Thanks for the reply.

I need some help from you. I need to test some simulation in vhdl. can you help me please.

 

[fpgadsp]

Hi paulsam2004,

I think you should visit this page:

http://www.cs.ucla.edu/classes/cs151C/#enhanced

Hope it helps.

Best regards,
Álvaro Perdigão

 

[fpgadsp]

Hi paulsam2004,

Also in that page, you should download of the "Electric guitar ...".

It has a presentation where one can read, on slide 19: "In order to add echo, we simply read data from 0ms address, read again from the 75ms address, and add them together. "

Hope it helps.

Best regards,
Álvaro Perdigão

 

[jiman]

It is clear that you need to design a DSP . Check

http://www.opencores.org

http://www.eg3.com/interstitial/rb1.htm

and a very good VHDL cookbook and you are ok.

This DSP should take the digital signal and transform it with the echo. Yous should also use Matlab which will help you to examin your signal before you download it in a FPGA. Also Matlab can convert maths to VHDL find this module on Goolge.

This think is not is to be done on a FPGA it is much more each to design this with oscillators and resistances but it will be faster .
I hope that i have helped you....