BEHAVIORAL ALU displays error on lines 21, 23-30

[NOOB]

--The IEEE standard 1164 package, declares std_logic, rising_edge(), etc.
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;

entity eALU16 is
port(
ipA: in std_logic_vector(0 to 15);
ipB: in std_logic_vector(0 to 15);
ipALUOp: in std_logic_vector(0 to 2);
opZero: out std_logic;
opResult: in std_logic_vector(0 to 15)
);
end eALU16;

architecture aALU16 of eALU16 is
begin

case ipALUOp is
when &quot;000&quot; => opResult <= ipA + ipB;
when &quot;001&quot; => opResult <= ipA - ipB;
when &quot;010&quot; => opResult <= ipA and ipB;
when &quot;011&quot; => opResult <= ipA or ipB;
when &quot;100&quot; => opResult <= not ipA + '1';
when &quot;101&quot; => opResult <= not ipB + '1';
when &quot;110&quot; => opResult <= 1 when (ipA < ipB) else 0;
when others => null;
end case;

opZero <= '1' when (opResult = &quot;0000000000000000&quot else '0';

end aALU16;

 

[VhdlForLife]

Looks like you defined your opResult to be an input. You need to make it an output.

You also need to place the case statement inside a process since it is sequential and not concurrent. When you do that you will need to change the three lines before the last line of your case statement.

If I'm not wrong, you can use ipA + 1; and ipB + 1; but not ipA+'1'; or ipB+'1'; because '1' is a bit while your opResult is a vector.

The second last line of the case statement cannot make use of a 'when' since a case statement is sequential.
You can use

if (ipA<ipB) then
opResult <= &quot;000000000000001&quot;;
else
opResult <= (others => '0');
end if;

Hope that helps a little.