When do AFTER Xns; and FOR Xns; work??

[buckeyes1997]

I have tried using them inside processes and they do nothing. I have tried using them outside processes and they do nothing. I'm using Quartus II.

when can I use an AFTER or FOR or even UNTIL in an architecture? Can they not be used in an architecture with a process?? Perhaps I have something set wrong in Quartus which is blocking them?

thanks for any help you can offer?

 

[jeandelfrigo]

buckeyes1997,

Are you trying to synthesize code with after or wait for xxns ?

This is not advisable, you should only use these statements in testbenches.

How would the inside of your FPGA know when 10 ns have passed????

For synthesis you should have a clock, this is the time base.
If for example you use a 100MHz clock then one period is 10 ns.

So if you have to wait 100 ns, you should make a counter on the clock with a terminal count that comes high after 10 clockcycles.

Regards,

jeandelfrigo