what is wrong with my code? 4

[rock31]

Hello,
I tried to come up a shell script to simplify the compiling command, but I don’t know why it does not work.
The original command is

cc -DHDFSYS –o ReadGDflds.o -I$HDFINC -I$HDFEOS_INC –c ReadGDflds.c
cc -DHDFSYS –o ReadGDflds ReadGDflds.o -L$HDFLIB -L$HDFEOS_LIB -lhdfeos -1Gctp -lmfhdf -ldf -ljpeg -lnsl -lz –lm

These commands work fine in command line, but it is too long for typing each time. So, I wrote a short sh script as below
##############################################################
#! /bin/sh -f
set LDFLAGS = '-lhdfeos -1Gctp -lmfhdf -ldf -ljpeg -lnsl -lz -lm'
set INCLUDE = '-I$HDFINC -I$HDFEOS_INC'
set LIBRARY = '-L$HDFLIB -L$HDFEOS_LIB'

foreach name ($argv)

if ( -f $name ) then
echo -n "compile and link '${name}'.c"
cc -DHDFSYS -o ${name}.o ${INCLUDE} -c ${name}.c
cc -DHDFSYS -o ${name} ${name}.o ${LIBRARY} ${LDFLAGS}
else
echo -n " file '${name}'.c is not found"
endif
end
#######################

I named it as fhdf.sh, and chmod u+x fhdf.sh. But while I ran with input as ReadGDflds, it gives a wrong message

f90HDF> fhdf ReadGDflds
fhdf.sh ReadGDflds
fhdf.sh: syntax error at line 6: `(' unexpected

Would anyone please help to check out what is wrong with this short script?
Thanks a lot

 

[PHV]

Seems you want a Bourn shell executes C-shell script !

Hope This Helps, PH.
Want to get great answers to your Tek-Tips questions? Have a look at FAQ219-2884 or FAQ222-2244

 

[stefanwagner]

Is this perhaps the reinvention of the Makefile?

seeking a job as java-programmer in Berlin:

http://home.arcor.de/hirnstrom/bewerbung

 

[Mike042]

Here's a Bourne shell version of your script, which hopefully should work (I haven't tested it fully):

#!/bin/sh
##############################################################
export LDFLAGS="-lhdfeos -1Gctp -lmfhdf -ldf -ljpeg -lnsl -lz -lm"
export INCLUDE="-I$HDFINC -I$HDFEOS_INC"
export LIBRARY="-L$HDFLIB -L$HDFEOS_LIB"

for name in $1 $2 $3 $4 $5 $6 $7 $8 $9
do
if [ -f $name ]
then
echo "Compile and link ${name}.c"
cc -DHDFSYS -o ${name}.o ${INCLUDE} -c ${name}.c
cc -DHDFSYS -o ${name} ${name}.o ${LIBRARY} ${LDFLAGS}
else
echo "File ${name}.c is not found"
fi
done

##############################################################


I hope that helps you.

Mike

 

[rock31]

Hello, PHV, Mike042 and stanfenwagner,
Thank you for your replied comments and script. They did a lot of help.
Yes, you all are absolutely right, where I was wrong is I tried to make C-shell to execute a bourne-shell program. So, I made a little change which fixed whole thing.

###################################
#! /bin/csh -vx –f ### this line is changed from #!/bin/sh
set LDFLAGS = '-lhdfeos -1Gctp -lmfhdf -ldf -ljpeg -lnsl -lz -lm'
set INCLUDE = '-I$HDFINC -I$HDFEOS_INC'
set LIBRARY = '-L$HDFLIB -L$HDFEOS_LIB'

foreach name ($argv)

if ( -f $name.c ) then
echo -n "compile and link '${name}'.c"
cc -DHDFSYS -o ${name}.o ${INCLUDE} -c ${name}.c
cc -DHDFSYS -o ${name} ${name}.o ${LIBRARY} ${LDFLAGS}
else
echo -n " file '${name}'.c is not found"
endif
end
#################################################

This short script is just a conventient way for direct compiling. It is not the re-invention of Makefile. But of course, just like any executable command, it can be inserted into Makefile after a defined rule.

Thank again
Rock31

 

[iribach]

rock31
listen to stefan
dont play with shells
and sure not with csh
learn make && makefile it's really better

 

[chipperMDW]

#! /bin/csh -vx –f

I'd be surprised if that's working correctly. You're only supposed to have one argument after the command in a line like that.

That is, your above command calls [tt]csh[/tt] with the single argument "[tt]-vx -f[/tt]" followed by your script. [tt]csh[/tt] might be able to figure that out for some reason, but in general, it's not a good idea. (It's a needless limitation, in my opinion. It could be that some kernels provide interpreters that allow multiple arguments; in that case, it might work, but it's non-portable).


Secondly, I'd suggest moving towards programming in [tt]sh[/tt]-derived shells instead of [tt]csh[/tt]-derived ones. Look for an article called "Csh Scripts Considered Harmful" or something similar.


Next, you can reduce the two lines in your script to one:

cc -DHDFSYS -o ${name} ${name}.c ${LIBRARY} ${LDFLAGS}

Finally, I think this has limited use. It lets you compile a one-file C program into an executable named after that file. You can do the exact same thing with Make without writing a Makefile through the use of implicit rules:

$ cat >hello.c
#include <stdio.h>
int main(void){ printf("Hello, world!\n"); }
^D

$ make
gcc -o hello hello.c

$ ls
hello       hello.c

$ ./hello
Hello, world!

 

[chipperMDW]

Well, ok... you have to type

make hello

instead of just

make

but same idea. Plus that means you can use it to build multiple files, which kinda puts your script out of business, I think.

 

[rock31]

Hello, ChipperMDW,
Thank you very much. All your three points are very insightful. They are big help to me.
Considering my specific problem, your third point (“make”) seems especially appealing. I tried what you listed above, it worked fine for simple code like “hello.c”. The only problem is I am not sure how to do the parallel job for a little complex situation. Before I link the object files to library and to obtain executive file, I have to first include several source files or header files whose locations are specified with “INCLUDE” in my script. Would you mind give an example to deal with this? O

Thanks again
Rock31

 

[PHV]

man make

Hope This Helps, PH.
Want to get great answers to your Tek-Tips questions? Have a look at FAQ219-2884 or FAQ222-2244

 

[chipperMDW]

Sorry for the delay.

Part of the implicit rules I mentioned is that they fill in the values of certain variables. For example, when compiling a C program, they use the varaible [tt]CFLAGS[/tt] to pass flags to the compiler; they uses the varaible [tt]LDFLAGS[/tt] to pass flags to the linker; they even use the variable [tt]CC[/tt] to get the nem of the C compiler.

So, to emulate your script, I would write a Makefile containing something like:

INCLUDES = -Iincludes -I../includes
CFLAGS = $INCLUDES -O3 -DAUTHOR=\"chip\"
LDFLAGS = -Llib -lmine

Typing [tt]make hello[/tt] on the command line would now run:

gcc -Iincludes -I../includes -O3 -DAUTHOR=\"chip\" -Llib -lmine hello.c -o hello

The man page for Make is the best place to look for this kind of info, but since it has absolutely everything, it can be daunting. If you're using a GNU system (e.g. Linux), you might find the info page ([tt]info make[/tt]) a little more digestible, since it's organized into sections. If you don't have an info file for make, you can find the same content at

http://www.gnu.org/software/make/manual/make.html

(though if you don't have GNU Make, some info there might not work for you).

 

[iribach]

i far prefer the solaris make

   INCL = . .. /usr/abc

   cc $(INCL:%=-I/include)

   will expand to

   cc -I./include -I../include -I/usr/abc/include

 

[rock31]

chipperMDW , iribach ,
Thank you two.
Have a wonderful day.
Rock31