Hi people.
I'm new in VHDL programming and i have a assignment topic to work but i need a little help with the analysis of the topic and need some recomendations to begin to work.
The topic is that:
Desing of a generic n-bit zero-phase filter using VHDL and Xilinx ISE(Xilinx is the software to programming the desing). The n-bit filter will receive a sequence of 2048 n-bits words and will produce an n + m bit output,with m to be determined by the students. The unit will use fixed point arithmetics with both the integer width in bits to be controlled with a generic. The unit should at least have a input to enable operation, and an output to indicate that the sequence has been processed.
Thanks, if some people can help me.
I'm new in VHDL programming and i have a assignment topic to work but i need a little help with the analysis of the topic and need some recomendations to begin to work.
The topic is that:
Desing of a generic n-bit zero-phase filter using VHDL and Xilinx ISE(Xilinx is the software to programming the desing). The n-bit filter will receive a sequence of 2048 n-bits words and will produce an n + m bit output,with m to be determined by the students. The unit will use fixed point arithmetics with both the integer width in bits to be controlled with a generic. The unit should at least have a input to enable operation, and an output to indicate that the sequence has been processed.
Thanks, if some people can help me.