urgent ! Design memory fifo

[morgisa]

Making a memory FIFO length 16KB in which the data are entered when the signal is push
high, and are read when the signal of pop is high.
The written data are stored with the code correction Hamming, and decoded when reading.
In this way the data in the memory FIFO are protected from errors on the single bit
The device will have the following I / O ports:
clk,res in Std logic
Push,pop in Std logic
Data_in in Std_logic_vector(7 downto 0)
Data_out out Std_logic_vector(7 downto 0)