Hello Guys,
After having my Ultra80 for many years now, for some reason one day the box just became unresponsive. After finding out that my eeprom basically got corrupted I decided to reprogram it using a procedure that I found on the web.
I can get to OBP, I can test all devices with success but when I set auto-boot? false and try to manually boot from cdrom is basically hangs at the part that its suppossed to boot from cd.
I have compiled a few snipets to see if anyone else maybe sees something that Might be missing. Any help appreciated.
Hardware Power ON
Master CPU : 0000.0000.0055.11a0
Slave CPU : 0000.0001.0055.11a0
Slave CPU : 0000.0002.0055.11a0
Slave CPU : 0000.0003.0055.11a0
Master E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Button Power ON
Master CPU : 0000.0000.0055.11a0
Slave CPU : 0000.0001.0055.11a0
Slave CPU : 0000.0002.0055.11a0
Slave CPU : 0000.0003.0055.11a0
Master E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Probing keyboard Done
Executing Power On SelfTest
0>
0>@(#) Sun Ultra 80(UltraSPARC-II 4-way) UPA/PCI POST 1.2.8 08/22/2000 07:50 PM
0>INFO: Processor 0 is master. CPU 450 MHz.
0>
0> <00> Init System BSS
0> <00> NVRAM Battery Detect Test
0> <00> NVRAM Scratch Addr Test
0> <00> DMMU TLB Tag Access Test
0> <00> DMMU TLB RAM Access Test
0> <00> IMMU TLB Tag Access Test
0> <00> IMMU TLB RAM Access Test
0> <00> Probe Ecache
0>INFO: 4096KB Ecache
0> <00> Ecache RAM Addr Test
0> <00> Ecache Tag Addr Test
0> <00> Ecache Tag Test
0> <00> Invalidate Ecache Tags
0>INFO: Processor 1 - UltraSPARC-II.
0>INFO: Processor 2 - UltraSPARC-II.
0>INFO: Processor 3 - UltraSPARC-II.
0> <00> Init SC Regs
0> <00> SC Address Reg Test
0> <00> SC Reg Index Test
0> <00> SC Regs Test
0> <00> SC Dtag RAM Addr Test
0> <00> SC Cache Size Init
0> <00> SC Dtag RAM Data Test
0> <00> SC Dtag Init
0> <00> Probe Memory
0>INFO: 1024MB Bank 0
0>INFO: 1024MB Bank 1
0>INFO: 1024MB Bank 2
0>INFO: 1024MB Bank 3
0> <00> Malloc Post Memory
0> <00> Init Post Memory
0> <00> Post Memory Addr Test
0> <00> Map PROM/STACK/NVRAM in DMMU
0> <00> Memory Stack Test
3> <00> DMMU TLB Tag Access Test
1> <00> DMMU TLB Tag Access Test
2> <00> DMMU TLB Tag Access Test
3> <00> DMMU TLB RAM Access Test
2> <00> DMMU TLB RAM Access Test
1> <00> DMMU TLB RAM Access Test
3> <00> IMMU TLB Tag Access Test
2> <00> IMMU TLB Tag Access Test
1> <00> IMMU TLB Tag Access Test
3> <00> IMMU TLB RAM Access Test
2> <00> IMMU TLB RAM Access Test
1> <00> IMMU TLB RAM Access Test
3> <00> Probe Ecache
3>INFO: 4096KB Ecache
3> <00> Ecache RAM Addr Test
2> <00> Probe Ecache
3> <00> Ecache Tag Addr Test
2>INFO: 4096KB Ecache
2> <00> Ecache RAM Addr Test
3> <00> Ecache Tag Test
1> <00> Probe Ecache
2> <00> Ecache Tag Addr Test
1>INFO: 4096KB Ecache
1> <00> Ecache RAM Addr Test
2> <00> Ecache Tag Test
1> <00> Ecache Tag Addr Test
1> <00> Ecache Tag Test
3> <00> Invalidate Ecache Tags
2> <00> Invalidate Ecache Tags
1> <00> Invalidate Ecache Tags
3> <00> Map PROM/STACK/NVRAM in DMMU
3> <00> Update Slave Stack/Frame Ptrs
2> <00> Map PROM/STACK/NVRAM in DMMU
2> <00> Update Slave Stack/Frame Ptrs
1> <00> Map PROM/STACK/NVRAM in DMMU
0> <00> DMMU Hit/Miss Test
1> <00> Update Slave Stack/Frame Ptrs
0> <00> IMMU Hit/Miss Test
0> <00> DMMU Little Endian Test
0> <00> IU ASI Access Test
0> <00> FPU ASI Access Test
3> <00> DMMU Hit/Miss Test
1> <00> DMMU Hit/Miss Test
2> <00> DMMU Hit/Miss Test
3> <00> IMMU Hit/Miss Test
1> <00> IMMU Hit/Miss Test
2> <00> IMMU Hit/Miss Test
3> <00> DMMU Little Endian Test
1> <00> DMMU Little Endian Test
2> <00> DMMU Little Endian Test
3> <00> IU ASI Access Test
1> <00> IU ASI Access Test
2> <00> IU ASI Access Test
3> <00> FPU ASI Access Test
1> <00> FPU ASI Access Test
2> <00> FPU ASI Access Test
3> <00> Dcache RAM Test
2> <00> Dcache RAM Test
1> <00> Dcache RAM Test
3> <00> Dcache Tag Test
2> <00> Dcache Tag Test
1> <00> Dcache Tag Test
3> <00> Icache RAM Test
2> <00> Icache RAM Test
1> <00> Icache RAM Test
3> <00> Icache Tag Test
2> <00> Icache Tag Test
1> <00> Icache Tag Test
3> <00> Icache Next Test
2> <00> Icache Next Test
1> <00> Icache Next Test
3> <00> Icache Predecode Test
2> <00> Icache Predecode Test
1> <00> Icache Predecode Test
0> <1f> Init Psycho
0> <1f> PIO Read Error, Master Abort Test ---> cdrom error?
0> <1f> PIO Read Error, Target Abort Test ---> cdrom error?
0> <1f> PIO Write Error, Master Abort Test
0> <1f> PIO Write Error, Target Abort Test
0> <1f> Timer Increment Test
0> <1f> Init Psycho
0> <1f> Pass-Thru DMA UE ECC Rd Err Lpbk Test
0> <00> V9 Instruction Test
0> <00> CPU Tick and Tick Compare Reg Test
0> <00> CPU Soft Trap Test
0> <00> CPU Softint Reg and Int Test
3> <00> V9 Instruction Test
1> <00> V9 Instruction Test
2> <00> V9 Instruction Test
3> <00> CPU Tick and Tick Compare Reg Test
1> <00> CPU Tick and Tick Compare Reg Test
2> <00> CPU Tick and Tick Compare Reg Test
0> <00> UltraSPARC-2 Prefetch Instructions Test
0> <00> Test 0: prefetch_mr
0> <00> Test 1: prefetch to non-cacheable page
0> <00> Test 2: prefetch to page with dmmu misss
0> <00> Test 3: prefetch miss does not check alignment
0> <00> Test 4: prefetcha with asi 0x4c is noped
0> <00> Test 5: prefetcha with asi 0x54 is noped
0> <00> Test 6: prefetcha with asi 0x6e is noped
0> <00> Test 7: prefetcha with asi 0x76 is noped
0> <00> Test 8: prefetch with fcn 5
0> <00> Test 9: prefetch with fcn 2
0> <00> Test 10: prefetch with fcn 12
0> <00> Test 11: prefetch with fcn 16 is noped
0> <00> Test 12: prefetch with fcn 29 is noped
0> <00> Test 13: prefetcha with asi 0x15 is noped
0> <00> Test 14: prefetch with fcn 3
0> <00> Test 15: prefetcha14 with fcn 2
0> <00> Test 16: prefetcha80_mr
0> <00> Test 17: prefetcha81_1r
0> <00> Test 18: prefetcha10_mw
0> <00> Test 19: prefetcha80_17 is noped
0> <00> Test 20: prefetcha10_6: illegal instruction trap
0> <00> Test 21: prefetcha11_1w
0> <00> Test 22: prefetcha81_31
0> <00> Test 23: prefetcha11_15: illegal instruction trap
0>STATUS =PASSED
Power On Selftest Completed
Status = 0000.0000.0000.0000 ffff.ffff.f00b.3f58 ff9f.ffff.0bd1.1111
Software Power ON
Master CPU : 0000.0000.0055.11a0
Slave CPU : 0000.0001.0055.11a0
Slave CPU : 0000.0002.0055.11a0
Slave CPU : 0000.0003.0055.11a0
Master E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
@(#) UPA/PCI 3.31 Version 0 created 2001/07/25 20:35
Clearing DTAGS Done
Probing Memory
CONFIG = 0000.0000.1010.1010
MEM BASE = 0000.0000.0000.0000
MEM SIZE = 0000.0001.0000.0000
MMUs ON
Copy Done
PC = 0000.01ff.f000.2b30
PC = 0000.0000.0000.2b74
Decompressing into Memory Done
Size = 0000.0000.0006.ee80
ttya initialized
SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0 SPOR:1 POR:0
Probing Memory Bank #0 1 1 1 1 : 4 Gigabytes
Probing Floppy: No drives detected
Probing EBUS SUNW,CS4231
Probing UPA Slot at 1e,0 SUNW,afb
Probing UPA Slot at 1d,0 Nothing there
Probing /pci@1f,4000 at Device 1 pci108e,1000 network
Probing /pci@1f,4000 at Device 3 scsi disk tape scsi disk tape
Probing /pci@1f,4000 at Device 2 Nothing there
Probing /pci@1f,4000 at Device 4 Nothing there
Probing /pci@1f,4000 at Device 5 Nothing there
Probing /pci@1f,2000 at Device 1 Nothing there
SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0 SPOR:1 POR:0
Probing Memory Bank #0 1 1 1 1 : 4 Gigabytes
Probing Floppy: No drives detected
Probing EBUS SUNW,CS4231
Probing UPA Slot at 1e,0 SUNW,afb
Probing UPA Slot at 1d,0 Nothing there
Probing /pci@1f,4000 at Device 1 pci108e,1000 network
Probing /pci@1f,4000 at Device 3 scsi disk tape scsi disk tape
Probing /pci@1f,4000 at Device 2 Nothing there
Probing /pci@1f,4000 at Device 4 Nothing there
Probing /pci@1f,4000 at Device 5 Nothing there
Probing /pci@1f,2000 at Device 1 Nothing there
(4 X UltraSPARC-II 450MHz), No Keyboard
OpenBoot 3.31, 4096 MB memory installed, Serial #64312.
Ethernet address 8:0:20:d1:fb:38, Host ID: 8000fb38.
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok setenv diag-switch? false
diag-switch? = false
{0} ok printenv
Variable Name Value Default Value
scsi-initiator-id 7 7
keyboard-click? false false
keymap
ttyb-rts-dtr-off false false
ttyb-ignore-cd true true
ttya-rts-dtr-off false false
ttya-ignore-cd true true
ttyb-mode 9600,8,n,1,- 9600,8,n,1,-
ttya-mode 9600,8,n,1,- 9600,8,n,1,-
pcia-probe-list 1 1
pcib-probe-list 1,3,2,4,5 1,3,2,4,5
enclosure-type
banner-name
energystar-enabled? false
mfg-mode off off
diag-level min min
#power-cycles 1431655798
system-board-serial#
system-board-date
fcode-debug? false false
output-device screen screen
input-device keyboard keyboard
load-base 16384 16384
boot-command boot boot
auto-boot? false true
watchdog-reboot? false false
diag-file
diag-device cdrom net
boot-file
boot-device disk net disk net
local-mac-address? false false
ansi-terminal? true true
screen-#columns 80 80
screen-#rows 34 34
silent-mode? false false
use-nvramrc? false false
nvramrc
security-mode none
security-password
security-#badlogins 4112
oem-logo
oem-logo? false false
oem-banner
oem-banner? false false
hardware-revision
last-hardware-update
diag-switch? false false
{0} ok
{0} ok setenv diag-device net
diag-device = net
{0} ok boot cdrom ---> it hangs right here...
(4 X UltraSPARC-II 450MHz), No Keyboard
OpenBoot 3.31, 4096 MB memory installed, Serial #64312.
Ethernet address 8:0:20:d1:fb:38, Host ID: 8000fb38.
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok test cdrom ---> this test passes ok
{0} ok boot cdrom ---> it does memory test and then it hangs while it tries to boot from the cdrom. cdrom does not even spin. It does spin when I do test cdrom and the read light turns on so it seems cdrom is ok.
If anyone has any comments or sugestions they would be very welcome and appreciated.
POPKORN...
After having my Ultra80 for many years now, for some reason one day the box just became unresponsive. After finding out that my eeprom basically got corrupted I decided to reprogram it using a procedure that I found on the web.
I can get to OBP, I can test all devices with success but when I set auto-boot? false and try to manually boot from cdrom is basically hangs at the part that its suppossed to boot from cd.
I have compiled a few snipets to see if anyone else maybe sees something that Might be missing. Any help appreciated.
Hardware Power ON
Master CPU : 0000.0000.0055.11a0
Slave CPU : 0000.0001.0055.11a0
Slave CPU : 0000.0002.0055.11a0
Slave CPU : 0000.0003.0055.11a0
Master E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Button Power ON
Master CPU : 0000.0000.0055.11a0
Slave CPU : 0000.0001.0055.11a0
Slave CPU : 0000.0002.0055.11a0
Slave CPU : 0000.0003.0055.11a0
Master E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Probing keyboard Done
Executing Power On SelfTest
0>
0>@(#) Sun Ultra 80(UltraSPARC-II 4-way) UPA/PCI POST 1.2.8 08/22/2000 07:50 PM
0>INFO: Processor 0 is master. CPU 450 MHz.
0>
0> <00> Init System BSS
0> <00> NVRAM Battery Detect Test
0> <00> NVRAM Scratch Addr Test
0> <00> DMMU TLB Tag Access Test
0> <00> DMMU TLB RAM Access Test
0> <00> IMMU TLB Tag Access Test
0> <00> IMMU TLB RAM Access Test
0> <00> Probe Ecache
0>INFO: 4096KB Ecache
0> <00> Ecache RAM Addr Test
0> <00> Ecache Tag Addr Test
0> <00> Ecache Tag Test
0> <00> Invalidate Ecache Tags
0>INFO: Processor 1 - UltraSPARC-II.
0>INFO: Processor 2 - UltraSPARC-II.
0>INFO: Processor 3 - UltraSPARC-II.
0> <00> Init SC Regs
0> <00> SC Address Reg Test
0> <00> SC Reg Index Test
0> <00> SC Regs Test
0> <00> SC Dtag RAM Addr Test
0> <00> SC Cache Size Init
0> <00> SC Dtag RAM Data Test
0> <00> SC Dtag Init
0> <00> Probe Memory
0>INFO: 1024MB Bank 0
0>INFO: 1024MB Bank 1
0>INFO: 1024MB Bank 2
0>INFO: 1024MB Bank 3
0> <00> Malloc Post Memory
0> <00> Init Post Memory
0> <00> Post Memory Addr Test
0> <00> Map PROM/STACK/NVRAM in DMMU
0> <00> Memory Stack Test
3> <00> DMMU TLB Tag Access Test
1> <00> DMMU TLB Tag Access Test
2> <00> DMMU TLB Tag Access Test
3> <00> DMMU TLB RAM Access Test
2> <00> DMMU TLB RAM Access Test
1> <00> DMMU TLB RAM Access Test
3> <00> IMMU TLB Tag Access Test
2> <00> IMMU TLB Tag Access Test
1> <00> IMMU TLB Tag Access Test
3> <00> IMMU TLB RAM Access Test
2> <00> IMMU TLB RAM Access Test
1> <00> IMMU TLB RAM Access Test
3> <00> Probe Ecache
3>INFO: 4096KB Ecache
3> <00> Ecache RAM Addr Test
2> <00> Probe Ecache
3> <00> Ecache Tag Addr Test
2>INFO: 4096KB Ecache
2> <00> Ecache RAM Addr Test
3> <00> Ecache Tag Test
1> <00> Probe Ecache
2> <00> Ecache Tag Addr Test
1>INFO: 4096KB Ecache
1> <00> Ecache RAM Addr Test
2> <00> Ecache Tag Test
1> <00> Ecache Tag Addr Test
1> <00> Ecache Tag Test
3> <00> Invalidate Ecache Tags
2> <00> Invalidate Ecache Tags
1> <00> Invalidate Ecache Tags
3> <00> Map PROM/STACK/NVRAM in DMMU
3> <00> Update Slave Stack/Frame Ptrs
2> <00> Map PROM/STACK/NVRAM in DMMU
2> <00> Update Slave Stack/Frame Ptrs
1> <00> Map PROM/STACK/NVRAM in DMMU
0> <00> DMMU Hit/Miss Test
1> <00> Update Slave Stack/Frame Ptrs
0> <00> IMMU Hit/Miss Test
0> <00> DMMU Little Endian Test
0> <00> IU ASI Access Test
0> <00> FPU ASI Access Test
3> <00> DMMU Hit/Miss Test
1> <00> DMMU Hit/Miss Test
2> <00> DMMU Hit/Miss Test
3> <00> IMMU Hit/Miss Test
1> <00> IMMU Hit/Miss Test
2> <00> IMMU Hit/Miss Test
3> <00> DMMU Little Endian Test
1> <00> DMMU Little Endian Test
2> <00> DMMU Little Endian Test
3> <00> IU ASI Access Test
1> <00> IU ASI Access Test
2> <00> IU ASI Access Test
3> <00> FPU ASI Access Test
1> <00> FPU ASI Access Test
2> <00> FPU ASI Access Test
3> <00> Dcache RAM Test
2> <00> Dcache RAM Test
1> <00> Dcache RAM Test
3> <00> Dcache Tag Test
2> <00> Dcache Tag Test
1> <00> Dcache Tag Test
3> <00> Icache RAM Test
2> <00> Icache RAM Test
1> <00> Icache RAM Test
3> <00> Icache Tag Test
2> <00> Icache Tag Test
1> <00> Icache Tag Test
3> <00> Icache Next Test
2> <00> Icache Next Test
1> <00> Icache Next Test
3> <00> Icache Predecode Test
2> <00> Icache Predecode Test
1> <00> Icache Predecode Test
0> <1f> Init Psycho
0> <1f> PIO Read Error, Master Abort Test ---> cdrom error?
0> <1f> PIO Read Error, Target Abort Test ---> cdrom error?
0> <1f> PIO Write Error, Master Abort Test
0> <1f> PIO Write Error, Target Abort Test
0> <1f> Timer Increment Test
0> <1f> Init Psycho
0> <1f> Pass-Thru DMA UE ECC Rd Err Lpbk Test
0> <00> V9 Instruction Test
0> <00> CPU Tick and Tick Compare Reg Test
0> <00> CPU Soft Trap Test
0> <00> CPU Softint Reg and Int Test
3> <00> V9 Instruction Test
1> <00> V9 Instruction Test
2> <00> V9 Instruction Test
3> <00> CPU Tick and Tick Compare Reg Test
1> <00> CPU Tick and Tick Compare Reg Test
2> <00> CPU Tick and Tick Compare Reg Test
0> <00> UltraSPARC-2 Prefetch Instructions Test
0> <00> Test 0: prefetch_mr
0> <00> Test 1: prefetch to non-cacheable page
0> <00> Test 2: prefetch to page with dmmu misss
0> <00> Test 3: prefetch miss does not check alignment
0> <00> Test 4: prefetcha with asi 0x4c is noped
0> <00> Test 5: prefetcha with asi 0x54 is noped
0> <00> Test 6: prefetcha with asi 0x6e is noped
0> <00> Test 7: prefetcha with asi 0x76 is noped
0> <00> Test 8: prefetch with fcn 5
0> <00> Test 9: prefetch with fcn 2
0> <00> Test 10: prefetch with fcn 12
0> <00> Test 11: prefetch with fcn 16 is noped
0> <00> Test 12: prefetch with fcn 29 is noped
0> <00> Test 13: prefetcha with asi 0x15 is noped
0> <00> Test 14: prefetch with fcn 3
0> <00> Test 15: prefetcha14 with fcn 2
0> <00> Test 16: prefetcha80_mr
0> <00> Test 17: prefetcha81_1r
0> <00> Test 18: prefetcha10_mw
0> <00> Test 19: prefetcha80_17 is noped
0> <00> Test 20: prefetcha10_6: illegal instruction trap
0> <00> Test 21: prefetcha11_1w
0> <00> Test 22: prefetcha81_31
0> <00> Test 23: prefetcha11_15: illegal instruction trap
0>STATUS =PASSED
Power On Selftest Completed
Status = 0000.0000.0000.0000 ffff.ffff.f00b.3f58 ff9f.ffff.0bd1.1111
Software Power ON
Master CPU : 0000.0000.0055.11a0
Slave CPU : 0000.0001.0055.11a0
Slave CPU : 0000.0002.0055.11a0
Slave CPU : 0000.0003.0055.11a0
Master E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
Slave E$ : 0000.0000.0040.0000
@(#) UPA/PCI 3.31 Version 0 created 2001/07/25 20:35
Clearing DTAGS Done
Probing Memory
CONFIG = 0000.0000.1010.1010
MEM BASE = 0000.0000.0000.0000
MEM SIZE = 0000.0001.0000.0000
MMUs ON
Copy Done
PC = 0000.01ff.f000.2b30
PC = 0000.0000.0000.2b74
Decompressing into Memory Done
Size = 0000.0000.0006.ee80
ttya initialized
SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0 SPOR:1 POR:0
Probing Memory Bank #0 1 1 1 1 : 4 Gigabytes
Probing Floppy: No drives detected
Probing EBUS SUNW,CS4231
Probing UPA Slot at 1e,0 SUNW,afb
Probing UPA Slot at 1d,0 Nothing there
Probing /pci@1f,4000 at Device 1 pci108e,1000 network
Probing /pci@1f,4000 at Device 3 scsi disk tape scsi disk tape
Probing /pci@1f,4000 at Device 2 Nothing there
Probing /pci@1f,4000 at Device 4 Nothing there
Probing /pci@1f,4000 at Device 5 Nothing there
Probing /pci@1f,2000 at Device 1 Nothing there
SC Control: EWP:0 IAP:0 FATAL:0 WAKEUP:0 BXIR:0 BPOR:0 SXIR:0 SPOR:1 POR:0
Probing Memory Bank #0 1 1 1 1 : 4 Gigabytes
Probing Floppy: No drives detected
Probing EBUS SUNW,CS4231
Probing UPA Slot at 1e,0 SUNW,afb
Probing UPA Slot at 1d,0 Nothing there
Probing /pci@1f,4000 at Device 1 pci108e,1000 network
Probing /pci@1f,4000 at Device 3 scsi disk tape scsi disk tape
Probing /pci@1f,4000 at Device 2 Nothing there
Probing /pci@1f,4000 at Device 4 Nothing there
Probing /pci@1f,4000 at Device 5 Nothing there
Probing /pci@1f,2000 at Device 1 Nothing there
(4 X UltraSPARC-II 450MHz), No Keyboard
OpenBoot 3.31, 4096 MB memory installed, Serial #64312.
Ethernet address 8:0:20:d1:fb:38, Host ID: 8000fb38.
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok setenv diag-switch? false
diag-switch? = false
{0} ok printenv
Variable Name Value Default Value
scsi-initiator-id 7 7
keyboard-click? false false
keymap
ttyb-rts-dtr-off false false
ttyb-ignore-cd true true
ttya-rts-dtr-off false false
ttya-ignore-cd true true
ttyb-mode 9600,8,n,1,- 9600,8,n,1,-
ttya-mode 9600,8,n,1,- 9600,8,n,1,-
pcia-probe-list 1 1
pcib-probe-list 1,3,2,4,5 1,3,2,4,5
enclosure-type
banner-name
energystar-enabled? false
mfg-mode off off
diag-level min min
#power-cycles 1431655798
system-board-serial#
system-board-date
fcode-debug? false false
output-device screen screen
input-device keyboard keyboard
load-base 16384 16384
boot-command boot boot
auto-boot? false true
watchdog-reboot? false false
diag-file
diag-device cdrom net
boot-file
boot-device disk net disk net
local-mac-address? false false
ansi-terminal? true true
screen-#columns 80 80
screen-#rows 34 34
silent-mode? false false
use-nvramrc? false false
nvramrc
security-mode none
security-password
security-#badlogins 4112
oem-logo
oem-logo? false false
oem-banner
oem-banner? false false
hardware-revision
last-hardware-update
diag-switch? false false
{0} ok
{0} ok setenv diag-device net
diag-device = net
{0} ok boot cdrom ---> it hangs right here...
(4 X UltraSPARC-II 450MHz), No Keyboard
OpenBoot 3.31, 4096 MB memory installed, Serial #64312.
Ethernet address 8:0:20:d1:fb:38, Host ID: 8000fb38.
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok
{0} ok test cdrom ---> this test passes ok
{0} ok boot cdrom ---> it does memory test and then it hangs while it tries to boot from the cdrom. cdrom does not even spin. It does spin when I do test cdrom and the read light turns on so it seems cdrom is ok.
If anyone has any comments or sugestions they would be very welcome and appreciated.
POPKORN...
