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RAM implementation

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aarthi25

Programmer
May 29, 2007
1
GB
Hi Friends

I am pretty new to VHDL. I have a RAM code that I need to place and route on a Virtex2Pro FPGA. But apparently I have problems with associating the I/O ports to that available on the FPGA!!! Can anybody please tell me how I can implement a RAM (using FILE read/write) on a FPGA?

Thank you.
 
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