From Ashenden "The Designer's guide to VHDL" :
The difference between the two is that a procedure encapsulates a collection of sequential statements that are executed for their effect, whereas a function encapsulates a collection of statements that compute a result. Thus a procedure is a generalization of a statement, whereas a function is a generalization of an expression.
In other words the function is more generalized, but really to my mind that makes it about the same as a parameterized procedure. Maybe someone else could give a better explanation.
as far as synthesis goes, it probably depends on what is in your function/procedure. But, given that a function is more generalized I would have to say that it is more likely to create similar chunks of logic whenever used, but a procedure is more likely to create one chunk of logic that is used in multiple places. But again, that would depend on what code is in the procedure/function and also where it is used.
Im sure I could write code that would produce the opposite of what I just said, so that is not a hard an fast rule. Given that, I don't really see much of a difference between the two except for yourself (and future users of your code) to understand that one is a more general than the other.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.