Please help with error

[SteveD73]

Hi,

Im getting the following error in the XILINX Project Navigator:


ERROR:MapLib:93 - Illegal LOC on symbol "w_clk" (pad signal=w_clk) or BUFGP symbol "w_clk_BUFGP" (output signal=w_clk_BUFGP), IPAD-IBUFG should only be LOCed to GCLKIOB site.


How can I assign w_clk to a general purpose I/O pin, rather than one of the clock inputs?

Thanks for any help,

 

[almahtar]

You could assign w_clk to a device that takes a clock input, and have it output a high every clock pulse... It's pretty much just tricking the vhdl compiler. It doesn't want the clock pulse used for non-clock devices, but you can have a device pretty much just echo the clock pulse it recieves, and use its output for whatever you wanted to use the clock pulse for.
Hope this helps.... Good luck.