I've run into a problem synthesizing multipliers.
Xillinx ISE Foundation (5.1) tells me that the output of the multiplier is "not reconstructed because there are some missing bus signals" during post translate model generation. The multiplier attempts to multiply two integers, but the output of the multiplier is always incorrect in the simulation (there is an 8x8 bit integer multiplier and a 17x2 bit integer multiplier that are both running into the same problem).
I was wondering if anyone might know if there is a way to get around this problem.
Xillinx ISE Foundation (5.1) tells me that the output of the multiplier is "not reconstructed because there are some missing bus signals" during post translate model generation. The multiplier attempts to multiply two integers, but the output of the multiplier is always incorrect in the simulation (there is an 8x8 bit integer multiplier and a 17x2 bit integer multiplier that are both running into the same problem).
I was wondering if anyone might know if there is a way to get around this problem.