interfacing C with VHDL using the Scirocco simulator (Synopsys)

[pinaki]

Hi,

I am using the Scirocco simulator (by Synopsys) for cosimulating a C module with the VHDL model. The calls to the VHDL model must be made from inside the C module. Can somebody tell me how to do this, or point me to some link which has such example? Any help will be highly appreciated.

thanks.