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Illegal LOC on symbol ...LOCed to GCLKIOB site

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sheenjrg

Programmer
Oct 14, 2003
14
US
hey guys I am using project navigator and I get the following error in the translation report

ERROR:MapLib:93 - Illegal LOC on symbol "fpga_cclk" (pad signal=fpga_cclk) or
IBUFG symbol "fpga_cclk_ibufg" (output signal=fpga_cclk_ibufg), IPAD-IBUFG
should only be LOCed to GCLKIOB site.

I used the following in my prgram

component BufG
port (
I : in STD_LOGIC;
O : out std_logic
);
end component BufG;
----
---
---....
U1: BufG port map (
I => FPGA_CCLK
O => SpiClk
);

Does anybody know how to solve this error?
 
Hmmm. Sounds like its got something to do with locking to a global clock.

Probably either:
1. Somehow you have assigned a location for that buffer which doesn't match the buffer type.

or
2. You should have used a non-global buffer (IBUF instead of IBUFG) because (for an unknown reason) you are not allowed to put that signal in a global tree.

thats my first guess.
 
I tried IBUFG too but it is not working.

I had two signals giving the same error message. I used a dummy signal to reroute the clk and got rid of one error but the other still keeps coming.

 
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