how to read this code

[compengr1]

Hi,
I am a beginner in vhdl, struggling with vhdl programming. I am currently reading books and trying to understand code by other authors. i have to understand a code structure like this:

entity declaration

architecture behavioral of entity is

signal declarations:

signal(0) <= '1' when signal_1(0)='0' and signal_2(0)='1' else '0';
signal(1) <= '1' when signal_1(1)='0' and signal_2(1)='1' else '0';
signal(2) <= '1' when signal_1(2)='0' and signal_2(2)='1' else '0';
signal(3) <= '1' when signal_1(3)='0' and signal_2(3)='1' else '0';

inport <=  data_in and not signal;

signal_4(0) <= '1' when signal(0)='0' and signal_2(0)='1' else '0';
signal_4(1) <= '1' when signal(1)='0' and signal_2(1)='1' else '0';
signal_4(2) <= '1' when signal(2)='0' and signal_2(2)='1' else '0';
signal_4(3) <= '1' when signal(3)='0' and signal_2(3)='1' else '0';

inport_1 <= signal or signal_4;

process(clk)
do something here
.
.
end  process

end behavioral

my questions are:

[ul]
[li]how this code will work, for behavioral part all statements execute concurrently, but signal_4 depends on signal so will second when-else would wait for signal computation?[/li]
[li] how inport would be computed, concurrently or sequentially?[/li]
[li]are all when else for signal computed simultaneously?[/li]
[li]if i want to count how many bits of signal are turning to '1' after all 4 bits are computed is the 1's counter after when else for signal is the only way to do it? can i somehow count 1's within the when else?[/li]
[li]if i want the same number of bits to go high for signal and signal_4, how can i do it?[/li]
[li] if there are more than one processes in a code will they execute concurrently as well, i understand that process executes seuqentially and is executed when sentivity list signals change?[/li]
[/ul]

I appreciate any help.