how to design a fixed point multiplier??

[smlvdk]

hi,

I have to design a processor in VHDL which does various multiplications and divisions to find a result which is a real number. As it is a hand held low power device I decided to use fixed point arithmetic for all the arithmetic operations involved in the design of the processor.

I would like to know the best way to design the low power processor in VHDL. How could I implement fixed point multiplication and division in VHDL? Can I use * operator? Or is it better to use some other algorithms for multiplications for low power processor?

Any help in this issue is greatly appreciated.

Thanks

 

[berett]

You can use / and * operators for signed/unsigned types (which are defined as the vectors of std_logic type bits)

the

use ieee.std_numeric.all;

clause is needed then.

Generally it is all synthesizable.
But the algorithms implemented are not the "bestest" presumably. E.g. for multiplication the Booth multiplier is commonly recognised as the fastest among the reasonable.

No idea how about low power ... sorry.

rgds
Berett

 

[VHDLguy]

As far as the low power stuff goes I would think its mainly related to your silicon.

For eaxmple if you were making an ASIC you would probably find that vendors have different processes that give different results: cost, speed, power etc. In an FPGA you are probably more limited, but you could probably compare options for the lowest power usage.

Then you have decisions like speed. The faster your clock, you are more likely to use more power (to a certain extent, I am sure there must be some kind of info on this from vendors). And voltages, different voltages (IO and core) will lead to more or less power usage. And also features, for example some special features like LVDS IO might eat up more power.

As for designing the processor, why? Many FPGAs come with either a built in processor, or a free core that you can implement to create a processor. If you are having to ask how to implement them, then most likely these options will be faster both in implementation time and processor performance. Unless of course it is a school project, in which case Berett's reponse should get you started. And reading up on vendor's power stuff as mentioned above should give you enough to make a argument as to what device to use and what coding to avoid etc.

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