how to define fine grain mult. in vhdl?? :(

[vhdlnewbie]

hello all

i am trying to write fine grain multiplication in vhdl.i am using the predefined
multiplication and addition units defined in the Quartus software. There should be eight
multiplication modules in the first level from top, four addition modules in second level, 2
addition modules in third level, and one addition module in the fourth level. The multiplier units
should receive two 1 bit inputs and result a 2 bit output. The adder units should receive two 2 bits
inputs and result in a two bit output. No carry-in carry-out or overflow should be considered for
simplicity.Memory unit uses 2 D flip flops.

Help will be very much appreciated.
THanks
Sunny