Help with Max +plus II, can't make library

[romgrad]

I can't make the library BITLIB using bit_pack.vhd. I need this library so I can run examples from the book entitled "Digital System Design using VHDL" I keep getting an error when I try to compile bit_pack.vhd. Someone help please

Thanks,

Rommel

 

[berett]

Hi
More info needed
what is there in the *.vhd, plus a few starting lines ?
what is your tool /& operating system / ?
is there anything reasonable written in the error message?

rgds

 

[romgrad]

Hi
More info needed
what is there in the *.vhd, plus a few starting lines ?
what is your tool /& operating system / ?
is there anything reasonable written in the error message?

rgds


Here are the first few lines of code in bit_pack.vhd>

-- Bit package for Digital System Design Using VHDL

package BIT_PACK is
function add4 (reg1,reg2: bit_vector(3 downto 0);carry: bit)
return bit_vector;
function falling_edge(signal clock:bit)
return Boolean ;


Tool: Altera Max+plus II 9.21
OS: WinXP
Error: VHDL Design File "bit_pack" must contain entity of the same name

Thanks for the response!