Tek-Tips is the largest IT community on the Internet today!

Members share and learn making Tek-Tips Forums the best source of peer-reviewed technical information on the Internet!

  • Congratulations TouchToneTommy on being selected by the Tek-Tips community for having the most helpful posts in the forums last week. Way to Go!

Generate a truth table ?

Status
Not open for further replies.

niakia

Programmer
Oct 1, 2005
2
US
I am to create an entity "counter" that has three clocks(clk1, clk2, clk3) to generate a truth table consisting of all eight exhaustive binary values for the three signals. Assume clk1 is the least significant bit and clk3 is the most significant of a truth table.

-Can someone help me to determine what i should do next please ? I am very new to VHDL and in need of guidance.
________________________________________________________

ENTITY counter IS
END counter;

ARCHITECTURE behavioral OF counter IS
SIGNAL clk1, clk2, clk3: BIT;
 
nikia,

You are trying to make a counter that has three clocks?
Why would you have three clocks?
Normally a counter has one clk on which it counts?

Do you want to use this counter to divide a clock by 2 ,4 and 8?

I would like to help you out but I do not really understand your intention.

Could you clarify please?

regards

jeandelfrigo
 
Status
Not open for further replies.

Part and Inventory Search

Sponsor

Back
Top