For loop delay???

[krkrkr]

Hi all,

If I assign a signal before a long for loop in a process, will that signal wait until the end of the process to take place?

ie process (a) is
variable cnt : std_logic_vector(0 to 15) :=X"0000";
begin
active <= '1';
for i 0 to 1000 loop
cnt := cnt + a;
end loop;
end process;

What if I want "active" take place once the process is activated and I don't want ot wait for the 1000 loop and reach the end of the process?

Regards.