Feb 6, 2006 #1 cpham99 Programmer Feb 3, 2006 2 US Hi all, I've new at this VHDL thing and i'm trying to implement a fixed pattern preamble state machine. Anyone have done this before, please help!!
Hi all, I've new at this VHDL thing and i'm trying to implement a fixed pattern preamble state machine. Anyone have done this before, please help!!