Internal and external synchronization sources for the LIM is not the same as the systems internal and external synchronization sources. External synchronization source for a LIM, is for example a GJUL board or TLU board placed in the LIM. Internal synchronization source for a LIM is the own clock oscillator in the LSU.
The LIM clock (LSU) supervises the external clock synchronization in the back plane that is transmitted from for example the TLU or the GJUL board. The status is reported to the supervision program and an alarm is issued in the following cases:
• External clock rate is not present although it is expected
• External clock rate is present although it is not expected
• More than one external clock rate present
• External clock rate is present but bad
• External clock rate is beyond boundaries
Thanks for the reply. Here is the result of SCEXP & GJTSP command. The system has only 1 LIM.
Best regards.
<SCEXP;
EXTERNAL SYNC RECEIVING LINES DATA
MASTER LIM STATUS [MASTER SCOPE]
FIRST CHOICE 1-0-00-0 SYNC RECEIVING
SECOND CHOICE NOT PRESENT
THIRD CHOICE NOT PRESENT
you can try to remove "all" SYNC sources (FEML, SEML, TEML, FESML, SESML, TESML, (FELL, SELL, TELL))
e.g.
SCEXI:FEML=R;
SCEXI:SEML=R;
....
SFCEI;
wait a few minutes, and set SYNC
SCEXI:FEML=1-0-00-0;
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