Error compiling VHDL Code

[Nag03]

Hi,

I am new to VHDL programming ..

I am trying to compile a VHDL code . I get the following error
# ERROR: SimpleSortMain.vhd(47): near "is": expecting: END

when do you usually get such errors

 

[naraic]

Sounds like you left out an

end if[\code] or an [code]end process[\code]

Post the code segment that the error occurs in.