Mar 21, 2006 #1 nbjpcpp Technical User Aug 8, 2005 3 US I was working with an 800 MHz Pentium. Measured the length of the IOWR or IORD pulse -- both were about 1 microsec. 800 Tclk is a lot of delay. What controls it and would it be possible to reduce it significantly ? How?
I was working with an 800 MHz Pentium. Measured the length of the IOWR or IORD pulse -- both were about 1 microsec. 800 Tclk is a lot of delay. What controls it and would it be possible to reduce it significantly ? How?