hey guys i am trying to implement a data buffer through vhdl that slows down the data which will be coming out of the parallel port serially which i convert to parallel and then write to an external mem chip and pump out the data again at the slower rate , al this is to be done using state machines (my boss is adamant!) any help at all guys would be greatly appreciated as i have a deadline of 2 weeks ... thanks again its using and altera board flex rules and its wrecking my head :-0