Tek-Tips is the largest IT community on the Internet today!

Members share and learn making Tek-Tips Forums the best source of peer-reviewed technical information on the Internet!

Register Log in
  • Congratulations Chris Miller on being selected by the Tek-Tips community for having the most helpful posts in the forums last week. Way to Go!

clock phase synchroniztion

Status
Not open for further replies.
senjed

senjed

Programmer
Nov 15, 2001
23
IR
is there any way to find the exact clock edges of a data stream, and generate such a clock? we know the frequency of the tx and know we want to have a clock exactly synchronized in the rx. any solution in VHDL?
 
Status
Not open for further replies.

Similar threads

Oppenheimer
  • Locked
  • Question
Clock Multiplier
Replies
1
Views
110
jeandelfrigo
jeandelfrigo
sunil401
  • Locked
  • Question
Clock Divider 100MHz to 26MHz
Replies
1
Views
111
jeandelfrigo
jeandelfrigo
ghitaion
  • Locked
  • Question
port map and clock
Replies
0
Views
66
ghitaion
ghitaion
vb001
  • Locked
  • Question
Basic Clock division help
Replies
1
Views
76
PaulieQ
PaulieQ
snooks911
  • Locked
  • Question
VHDL - Driving 1 bit off 2 clocks
Replies
1
Views
83
BertVhdl
BertVhdl

Part and Inventory Search

Sponsor

Back
Top