Clock duty cycle

[morem]

Hi,

I am looking for a way to change the duty cycle of the clock.
The global clock is received from outside, and I need the new clock with the same frequency but let's say 75% duty cycle.
The problem is that the design should be synthesized (can't use after stat.)

Thanks.

 

[RVSachin]

Don't know if it's possible to have a 75% duty cycle clock with same frequency as that of the input clock.

In any case, check if the following link will help you in any way:

http://www.atmel.com/dyn/resources/prod_documents/DOC2324.PDF

 

[RVSachin]

One more link:

http://www.free-ip.com/cores.htm