Tek-Tips is the largest IT community on the Internet today!
Members share and learn making Tek-Tips Forums the best source of peer-reviewed technical information on the Internet!
-
Congratulations strongm on being selected by the Tek-Tips community for having the most helpful posts in the forums last week. Way to Go!
Search results for query: *
- Users: astrophobic
- Order by date
-
ERROR Use "set -loop_iteration_limit XX"
hello i made the following programm for a seriel parity generator. the problem is if i try to synthesize it i get the following error: ERROR:Xst:1312 - Loop has iterated 64 times. Use "set -loop_iteration_limit XX" to iterate more. the program: entity paritaet_seriel is port(...- astrophobic
- Thread
- Replies: 1
- Forum: VHDL
