Hi,
whenever i include a 'mod' function in my code, an error will occur during synthesis where it state that a modular function of 2 must be carry out.
May i know why is this so and is there any way to carry out a "mod" function? (wat i'm doing now is to loop a subtract for a number...
Hi,
I'm implementing Reed Solomon (255,223) on FPGA using VHDL. Before hand, I've implemented a RS(15,11) as a prototype and it works fine. However, i faced trouble when i try upscale it to (255,223) which used up a huge number of gates and slices. I believe this is mainly due to the finite...
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