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thank you so very much, thats got it a treat, there seemed to be a bit of an error in my last logic, i tried to boild down all the muxes and that into 'purer' logic, it didnt quite work though. as folows is the final working code, just to get it on record, to help anyone lese trying to do this...

I have finally got somewhere, this code seems to work (this is one unit): library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; use work.calculator_package.ALL; -- Uncomment the following lines to use the declarations that are -- provided...

asserting the init to zero when the first '1' is placed on the mod in, makes no difference. this may be obviouss, but i thought it better to try it. cheers mynci.

right, i may have made another advance. because of this line fromt he original document: "To start a new conversion, INIT should be asserted at the time the binary MSB is applied to the converter input. INIT clears all bits except the LSB which is loaded." this sort of implies that instead of...

just realised, the ram blocks that it implements are for my 'case' structure to determine the key type, i will get round this once i have the blocks working, by muxing the 4 bit bcd outputs into one 'key_type' converter. now just to work out why it isnt doign what i want it to :) cheers mynci

sorry, one last update, i have overwritten the old file linked above with the new code (which uses your logic code directly - i decided that it would be better as it rendered to a cct much more elegantly). i am at a loss to getting it to work as exppected though. i have tried shifting the...

a few more things to add (sorry): i noticed i was shifting the data in to the test array MSB first, it should (I think) be LSb first. i have removed the delay that stopped each one being enabled for 6 clock cycles as i think it was wrong (i have just tied each of the enables to 1, for the sake...

thank you once again. i think i will keep making the same error on concatenations from now on, like some sort of curse. i have managed to make the unit work wnen free standing (ie just one, with a four bit number). i am not sure if its correct but i have attempted to enable the next unit...

i think i am getting somewhere with this, however i dont think that the logic is quite correct in the conversion unit. at the bottom is a link to the whole project file(i thought this was easier, as you could see all the data types and method of simulation etc). if you could be bothered to take...

ok, heres the modified code, i havent had chance to test it (will do ina few hours), but i thought it may have been of interest, or you may spot another glaring ommision. cheers mynci library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL...

thanks a lot, i shall make those modifications. i think i have got the joins ok, i (think) i can handle stuctural creations ok (they make more sense to me), but i shall let you know how i get on. the modtest thing is obvious, im embarrased for not spotting it :) i wasnt sure how to implement...

it will be displayed on a set of ten 7 segment displays (the led digit read-out things - is that not a standard term?), the integer is 2's comp(but i can deal the negative seperately, i hope :) ) the code i have (and this has been altered from the original somewhat in my attempts to make it...

thank you very much VHDLguy. im sorry if it wasnt clear, i have a 32 bit binary number and need to display each of the digits ona seven segment display. however due to the way this problem is preseted the outputs are of a more abtract type than simply BCD, ie the unit must out put a value of...

hi, i know this is simple stuff, but it has been driving me mad trying to implement it. i have a number stored as a 32bit std_logic_vector. i need to convert it into bcd for display. im sure this is fantastically simple and annoying to be asked how to do it, but im yet to find a simple (and non...

basically i am getting error C2926, it is brought about by this piece of code: CLinkedList<struct TagStruct> TagStructList; clinkedlist is a class that sontroles a liked list, this line is meant to create a list of struct TagStruct objects called TagStructList. the structure itself is made...

ok i have memory mapped a file using CreateFileMapping. basically i don't really understand the systax of MapViewOfFile, what exactly are dwFileOffsetHigh and dwFileOffsetLow? how do i set it up to allocate enough memory for whatever file i open? sorry if this is a really vague question but i'm...