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Run behavior
hey, can any one explain me whats the difference between "intialization behavior" and "run behavior" in VHDL code execution. thanks PRAVEEN -
VHDL Package Port Mapping
hi! in u r package there are two inputs(I,S) AND ONE O/P Z BUT IN U R MAIN PROGRAM U R NOT SUPPLYING TWO INPUTS SO THATS THE EORROR I GUESS.... AND ONE MORE THING IS U R PACKAGE RETUNRS 1 BIT OUT PUT BUT IN U R MAIN PROGRAM ENTITY U TOOK OUT PUT AS 8 BIT VERCTOR...SO CHANGE THOSE THING AND GIVE... -
test bench problem
hi! in u r library files u included ieee and std but not work library so i guess thats why u r getting error. as general entity is in work library so we have to include work library while compiilation. lets try by including the following code. LIBRARY WORK; USE WORK.general.ALL; if u get any... -
slicing /inverting vectors?
hi! in u r code u r not storing the present value in the intermediate variable so u will loose some bits before reversing the bus. so first store u r bus bits in some temporary variable say temp(15 down to 0) <= tx_dat_s(15 downto 4) then from the temp varible reverse the bits to...
