Tek-Tips is the largest IT community on the Internet today!

Members share and learn making Tek-Tips Forums the best source of peer-reviewed technical information on the Internet!

Register Log in
  • Congratulations IamaSherpa on being selected by the Tek-Tips community for having the most helpful posts in the forums last week. Way to Go!

Search results for query: *

  1. jackslap442

    VHDL Package Port Mapping

    I have created an 8 to 1 mux package. I now wish to use this package in another file but cant get the port mapping right. The package compiles without error and I have included the work library in the file in which i am using the package. Sample code below. --Mux package entity mux8t01...

Part and Inventory Search

Back
Top