Tek-Tips is the largest IT community on the Internet today!
Members share and learn making Tek-Tips Forums the best source of peer-reviewed technical information on the Internet!
-
Congratulations SkipVought on being selected by the Tek-Tips community for having the most helpful posts in the forums last week. Way to Go!
-
ghdl: no definition for "and" and "or" operator
Hi all, I'm using ghdl to compile some vhdl code and I can't get the "and" and "or" operators to work. Here's the file where I'm using it: library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; use ieee.std_logic_unsigned.all; entity question3 is Port (D :in std_logic_vector(3...
