I have some error that cannot fix:
1. set on less than
2. cannot assign A,B for test purpose
Here is my code>>>>
library IEEE;
use IEEE.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity ALU is
port (
A, B: in BIT_VECTOR(3 downto 0);
OP: in BIT_VECTOR(2 downto 0);
CLK: in BIT;
F...
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