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SPI interface
I figured it out, here is what I did for all of you who are curious architecture cirrus_spi_trans_a of cirrus_spi_trans is signal SD_L_shift :std_logic_vector(max_val downto 0); --shift register for left channel signal SD_R_shift :std_logic_vector(max_val... -
SPI interface
Hello all, I designing an SPI interface between an FPGA and a audio reciever IC. In order for the information to be passed correctly, the data has to be transmitted exactly when the Word Clock (ILRCK_i) toggles. Thus far I have not been able to accomplish this, I lose 2 to 3 clock cycles before...
