I wonder why i use the clause like:
a<=b after 10 ns
there is no effect in the timing simulation.
why does it like this?
Is there any differences in the waveform if using the functional or timing simulation with above clause?
I am using quartus 2 web edition.
Thanks in advance..
I am successful synthesize the code but the delay is quite large...It's undesirable...
IS there any suggestion to revise the code?
The cct diagram and also the code with be attached here..
Thank for helping....
LIBRARY ieee;
USE ieee.STD_LOGIC_1164.all;
USE ieee.STD_LOGIC_ARITH.all;
USE...
I m curently work out this converter but the compilation is not successful. Below is the codes and error message. And I am using shift add3 algorithm for this.
LIBRARY ieee;
USE ieee.STD_LOGIC_1164.all;
USE ieee.STD_LOGIC_ARITH.all;
USE ieee.STD_LOGIC_UNSIGNED.all;
ENTITY projectTest3 IS
port(...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.