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Need Help implementing two state machines in vhdl entity
Hi, please can anyone tell me if the code i have written below is correct and working. it has two state machines. one reads the register and the other writes to the register. should i use signal PIW_Internal or declare a global variable. i understand that the code has little meaning if not... -
need help with synchronous input vs. clock
Hi, please can anyone tell me if the code i have written below is correct and working. it has two state machines. one reads the register and the other writes to the register. should i use signal PIW_Internal or declare a global variable. i understand that the code has little meaning if not...
